March Docs

Simd

Simd -- explicit 128-bit SIMD vector values (F32x4, F64x2, I32x4, I64x2, U8x16). Fixed width: identical semantics on every target, interpreted or compiled. See docs/simd-vectorization.md.

Boundary rule: lane get/set traffic in widened Int/Float; integer narrowing wraps mod 2^w two's-complement; f32 narrowing rounds to nearest-even; u8 loads zero-extend (0..255), i32 sign-extends. Integer lane arithmetic wraps. Float lanes are true single/double precision. min/max/hmin/hmax on floats use minNum/maxNum semantics (a NaN operand loses to the other; both NaN is NaN). sum accumulates sequentially (f32x4/f64x2 in double, i32x4/i64x2 in i64).

Lane order: lane 0 is the first make_* argument / lowest-addressed on load.

Mask convention: select/any/all/first_set all read a lane's HIGH BIT (its sign bit), matching hardware blend/movemask. eq/lt/gt still produce canonical all-ones/all-zero lanes, which read the same either way; a hand-rolled non-canonical mask lane follows the high-bit rule.

Functions

fnadd_f32x4add_f32x4(a, b) do simd_f32x4_add(a, b) end#

Per-lane addition, rounded to binary32.

fnadd_f64x2add_f64x2(a, b) do simd_f64x2_add(a, b) end#

Per-lane addition.

fnadd_i32x4add_i32x4(a, b) do simd_i32x4_add(a, b) end#

Per-lane addition, wraps mod 2^w.

fnadd_i64x2add_i64x2(a, b) do simd_i64x2_add(a, b) end#

Per-lane addition, wraps mod 2^w.

fnall_f32x4all_f32x4(v) do simd_f32x4_all(v) end#

True if every lane's high bit is set (interprets [v] as a mask).

fnall_f64x2all_f64x2(v) do simd_f64x2_all(v) end#

True if every lane's high bit is set (interprets [v] as a mask).

fnall_i32x4all_i32x4(v) do simd_i32x4_all(v) end#

True if every lane's high bit is set (interprets [v] as a mask).

fnall_i64x2all_i64x2(v) do simd_i64x2_all(v) end#

True if every lane's high bit is set (interprets [v] as a mask).

fnall_u8x16all_u8x16(v) do simd_u8x16_all(v) end#

True if every lane's high bit is set (interprets [v] as a mask).

fnand_f32x4and_f32x4(a, b) do simd_f32x4_and(a, b) end#

Per-lane bitwise AND.

fnand_f64x2and_f64x2(a, b) do simd_f64x2_and(a, b) end#

Per-lane bitwise AND.

fnand_i32x4and_i32x4(a, b) do simd_i32x4_and(a, b) end#

Per-lane bitwise AND.

fnand_i64x2and_i64x2(a, b) do simd_i64x2_and(a, b) end#

Per-lane bitwise AND.

fnand_u8x16and_u8x16(a, b) do simd_u8x16_and(a, b) end#

Per-lane bitwise AND.

fnany_f32x4any_f32x4(v) do simd_f32x4_any(v) end#

True if any lane's high bit is set (interprets [v] as a mask).

fnany_f64x2any_f64x2(v) do simd_f64x2_any(v) end#

True if any lane's high bit is set (interprets [v] as a mask).

fnany_i32x4any_i32x4(v) do simd_i32x4_any(v) end#

True if any lane's high bit is set (interprets [v] as a mask).

fnany_i64x2any_i64x2(v) do simd_i64x2_any(v) end#

True if any lane's high bit is set (interprets [v] as a mask).

fnany_u8x16any_u8x16(v) do simd_u8x16_any(v) end#

True if any lane's high bit is set (interprets [v] as a mask).

fndiv_f32x4div_f32x4(a, b) do simd_f32x4_div(a, b) end#

Per-lane division.

fndiv_f64x2div_f64x2(a, b) do simd_f64x2_div(a, b) end#

Per-lane division.

fneq_f32x4eq_f32x4(a, b) do simd_f32x4_eq(a, b) end#

Per-lane equality mask (all-ones lane where equal, zero otherwise).

fneq_f64x2eq_f64x2(a, b) do simd_f64x2_eq(a, b) end#

Per-lane equality mask (all-ones lane where equal, zero otherwise).

fneq_i32x4eq_i32x4(a, b) do simd_i32x4_eq(a, b) end#

Per-lane equality mask (all-ones lane where equal, zero otherwise).

fneq_i64x2eq_i64x2(a, b) do simd_i64x2_eq(a, b) end#

Per-lane equality mask (all-ones lane where equal, zero otherwise).

fneq_u8x16eq_u8x16(a, b) do simd_u8x16_eq(a, b) end#

Per-lane equality mask (all-ones lane where equal, zero otherwise).

fnextract_f32x4extract_f32x4(v, i : {Int | 0 <= _ && _ < 4}) do simd_f32x4_extract(v, i) end#

Lane [i] (0-3), widened to Float exactly.

fnextract_f64x2extract_f64x2(v, i : {Int | 0 <= _ && _ < 2}) do simd_f64x2_extract(v, i) end#

Lane [i] (0-1), widened to Float exactly.

fnextract_i32x4extract_i32x4(v, i : {Int | 0 <= _ && _ < 4}) do simd_i32x4_extract(v, i) end#

Lane [i] (0-3), widened to Int exactly.

fnextract_i64x2extract_i64x2(v, i : {Int | 0 <= _ && _ < 2}) do simd_i64x2_extract(v, i) end#

Lane [i] (0-1), widened to Int exactly.

fnextract_u8x16extract_u8x16(v, i : {Int | 0 <= _ && _ < 16}) do simd_u8x16_extract(v, i) end#

Lane [i] (0-15), widened to Int exactly.

fnfirst_set_f32x4first_set_f32x4(v) do simd_f32x4_first_set(v) end#

Index of the first lane whose high bit is set (interprets [v] as a mask), or -1 if none.

fnfirst_set_f64x2first_set_f64x2(v) do simd_f64x2_first_set(v) end#

Index of the first lane whose high bit is set (interprets [v] as a mask), or -1 if none.

fnfirst_set_i32x4first_set_i32x4(v) do simd_i32x4_first_set(v) end#

Index of the first lane whose high bit is set (interprets [v] as a mask), or -1 if none.

fnfirst_set_i64x2first_set_i64x2(v) do simd_i64x2_first_set(v) end#

Index of the first lane whose high bit is set (interprets [v] as a mask), or -1 if none.

fnfirst_set_u8x16first_set_u8x16(v) do simd_u8x16_first_set(v) end#

Index of the first lane whose high bit is set (interprets [v] as a mask), or -1 if none.

fnfma_f32x4fma_f32x4(a, b, c) do simd_f32x4_fma(a, b, c) end#

Per-lane fused multiply-add: [a] * [b] + [c], one rounding.

fnfma_f64x2fma_f64x2(a, b, c) do simd_f64x2_fma(a, b, c) end#

Per-lane fused multiply-add: [a] * [b] + [c], one rounding.

fngt_f32x4gt_f32x4(a, b) do simd_f32x4_gt(a, b) end#

Per-lane greater-than mask (all-ones lane where [a] > [b], zero otherwise).

fngt_f64x2gt_f64x2(a, b) do simd_f64x2_gt(a, b) end#

Per-lane greater-than mask (all-ones lane where [a] > [b], zero otherwise).

fngt_i32x4gt_i32x4(a, b) do simd_i32x4_gt(a, b) end#

Per-lane greater-than mask (all-ones lane where [a] > [b], zero otherwise).

fngt_i64x2gt_i64x2(a, b) do simd_i64x2_gt(a, b) end#

Per-lane greater-than mask (all-ones lane where [a] > [b], zero otherwise).

fngt_u8x16gt_u8x16(a, b) do simd_u8x16_gt(a, b) end#

Per-lane greater-than mask (all-ones lane where [a] > [b], zero otherwise).

fnhmax_f32x4hmax_f32x4(v) do simd_f32x4_hmax(v) end#

Horizontal maximum of all lanes (minNum/maxNum: a NaN lane yields the other operand; both NaN yields NaN).

fnhmax_f64x2hmax_f64x2(v) do simd_f64x2_hmax(v) end#

Horizontal maximum of all lanes (minNum/maxNum: a NaN lane yields the other operand; both NaN yields NaN).

fnhmax_i32x4hmax_i32x4(v) do simd_i32x4_hmax(v) end#

Horizontal maximum of all lanes.

fnhmax_i64x2hmax_i64x2(v) do simd_i64x2_hmax(v) end#

Horizontal maximum of all lanes.

fnhmin_f32x4hmin_f32x4(v) do simd_f32x4_hmin(v) end#

Horizontal minimum of all lanes (minNum/maxNum: a NaN lane yields the other operand; both NaN yields NaN).

fnhmin_f64x2hmin_f64x2(v) do simd_f64x2_hmin(v) end#

Horizontal minimum of all lanes (minNum/maxNum: a NaN lane yields the other operand; both NaN yields NaN).

fnhmin_i32x4hmin_i32x4(v) do simd_i32x4_hmin(v) end#

Horizontal minimum of all lanes.

fnhmin_i64x2hmin_i64x2(v) do simd_i64x2_hmin(v) end#

Horizontal minimum of all lanes.

fnload_f32x4load_f32x4(arr, i : Int) do simd_f32x4_load(arr, i) end#

Load 4 lanes from [arr] starting at index [i] (dynamic bounds check; panics out of range).

fnload_f64x2load_f64x2(arr, i : Int) do simd_f64x2_load(arr, i) end#

Load 2 lanes from [arr] starting at index [i] (dynamic bounds check; panics out of range).

fnload_i32x4load_i32x4(arr, i : Int) do simd_i32x4_load(arr, i) end#

Load 4 lanes from [arr] starting at index [i] (dynamic bounds check; panics out of range).

fnload_i64x2load_i64x2(arr, i : Int) do simd_i64x2_load(arr, i) end#

Load 2 lanes from [arr] starting at index [i] (dynamic bounds check; panics out of range).

fnload_u8x16load_u8x16(arr, i : Int) do simd_u8x16_load(arr, i) end#

Load 16 lanes from [arr] starting at index [i] (dynamic bounds check; panics out of range).

fnlt_f32x4lt_f32x4(a, b) do simd_f32x4_lt(a, b) end#

Per-lane less-than mask (all-ones lane where [a] < [b], zero otherwise).

fnlt_f64x2lt_f64x2(a, b) do simd_f64x2_lt(a, b) end#

Per-lane less-than mask (all-ones lane where [a] < [b], zero otherwise).

fnlt_i32x4lt_i32x4(a, b) do simd_i32x4_lt(a, b) end#

Per-lane less-than mask (all-ones lane where [a] < [b], zero otherwise).

fnlt_i64x2lt_i64x2(a, b) do simd_i64x2_lt(a, b) end#

Per-lane less-than mask (all-ones lane where [a] < [b], zero otherwise).

fnlt_u8x16lt_u8x16(a, b) do simd_u8x16_lt(a, b) end#

Per-lane less-than mask (all-ones lane where [a] < [b], zero otherwise).

fnmake_f32x4make_f32x4(v0 : Float, v1 : Float, v2 : Float, v3 : Float) do simd_f32x4_make(v0, v1, v2, v3) end#

Vector with lane 0 = the first argument, ..., lane 3 = the last.

fnmake_f64x2make_f64x2(v0 : Float, v1 : Float) do simd_f64x2_make(v0, v1) end#

Vector with lane 0 = the first argument, ..., lane 1 = the last.

fnmake_i32x4make_i32x4(v0 : Int, v1 : Int, v2 : Int, v3 : Int) do simd_i32x4_make(v0, v1, v2, v3) end#

Vector with lane 0 = the first argument, ..., lane 3 = the last.

fnmake_i64x2make_i64x2(v0 : Int, v1 : Int) do simd_i64x2_make(v0, v1) end#

Vector with lane 0 = the first argument, ..., lane 1 = the last.

fnmake_u8x16make_u8x16(v0 : Int, v1 : Int, v2 : Int, v3 : Int, v4 : Int, v5 : Int, v6 : Int, v7 : Int, v8 : Int, v9 : Int, v10 : Int, v11 : Int, v12 : Int, v13 : Int, v14 : Int, v15 : Int) do simd_u8x16_make(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11, v12, v13, v14, v15) end#

Vector with lane 0 = the first argument, ..., lane 15 = the last.

fnmax_f32x4max_f32x4(a, b) do simd_f32x4_max(a, b) end#

Per-lane maximum (minNum/maxNum: a NaN lane yields the other operand; both NaN yields NaN).

fnmax_f64x2max_f64x2(a, b) do simd_f64x2_max(a, b) end#

Per-lane maximum (minNum/maxNum: a NaN lane yields the other operand; both NaN yields NaN).

fnmax_i32x4max_i32x4(a, b) do simd_i32x4_max(a, b) end#

Per-lane maximum.

fnmax_i64x2max_i64x2(a, b) do simd_i64x2_max(a, b) end#

Per-lane maximum.

fnmin_f32x4min_f32x4(a, b) do simd_f32x4_min(a, b) end#

Per-lane minimum (minNum/maxNum: a NaN lane yields the other operand; both NaN yields NaN).

fnmin_f64x2min_f64x2(a, b) do simd_f64x2_min(a, b) end#

Per-lane minimum (minNum/maxNum: a NaN lane yields the other operand; both NaN yields NaN).

fnmin_i32x4min_i32x4(a, b) do simd_i32x4_min(a, b) end#

Per-lane minimum.

fnmin_i64x2min_i64x2(a, b) do simd_i64x2_min(a, b) end#

Per-lane minimum.

fnmul_f32x4mul_f32x4(a, b) do simd_f32x4_mul(a, b) end#

Per-lane multiplication, rounded to binary32.

fnmul_f64x2mul_f64x2(a, b) do simd_f64x2_mul(a, b) end#

Per-lane multiplication.

fnmul_i32x4mul_i32x4(a, b) do simd_i32x4_mul(a, b) end#

Per-lane multiplication, wraps mod 2^w.

fnmul_i64x2mul_i64x2(a, b) do simd_i64x2_mul(a, b) end#

Per-lane multiplication, wraps mod 2^w.

fnnot_f32x4not_f32x4(v) do simd_f32x4_not(v) end#

Per-lane bitwise complement.

fnnot_f64x2not_f64x2(v) do simd_f64x2_not(v) end#

Per-lane bitwise complement.

fnnot_i32x4not_i32x4(v) do simd_i32x4_not(v) end#

Per-lane bitwise complement.

fnnot_i64x2not_i64x2(v) do simd_i64x2_not(v) end#

Per-lane bitwise complement.

fnnot_u8x16not_u8x16(v) do simd_u8x16_not(v) end#

Per-lane bitwise complement.

fnor_f32x4or_f32x4(a, b) do simd_f32x4_or(a, b) end#

Per-lane bitwise OR.

fnor_f64x2or_f64x2(a, b) do simd_f64x2_or(a, b) end#

Per-lane bitwise OR.

fnor_i32x4or_i32x4(a, b) do simd_i32x4_or(a, b) end#

Per-lane bitwise OR.

fnor_i64x2or_i64x2(a, b) do simd_i64x2_or(a, b) end#

Per-lane bitwise OR.

fnor_u8x16or_u8x16(a, b) do simd_u8x16_or(a, b) end#

Per-lane bitwise OR.

fnreplace_f32x4replace_f32x4(v, i : {Int | 0 <= _ && _ < 4}, x : Float) do simd_f32x4_replace(v, i, x) end#

[v] with lane [i] set to [x] (rounded to binary32).

fnreplace_f64x2replace_f64x2(v, i : {Int | 0 <= _ && _ < 2}, x : Float) do simd_f64x2_replace(v, i, x) end#

[v] with lane [i] set to [x].

fnreplace_i32x4replace_i32x4(v, i : {Int | 0 <= _ && _ < 4}, x : Int) do simd_i32x4_replace(v, i, x) end#

[v] with lane [i] set to [x].

fnreplace_i64x2replace_i64x2(v, i : {Int | 0 <= _ && _ < 2}, x : Int) do simd_i64x2_replace(v, i, x) end#

[v] with lane [i] set to [x].

fnreplace_u8x16replace_u8x16(v, i : {Int | 0 <= _ && _ < 16}, x : Int) do simd_u8x16_replace(v, i, x) end#

[v] with lane [i] set to [x].

fnselect_f32x4select_f32x4(mask, a, b) do simd_f32x4_select(mask, a, b) end#

Per-lane: [mask]'s lane high bit set selects [a]'s lane, else [b]'s lane.

fnselect_f64x2select_f64x2(mask, a, b) do simd_f64x2_select(mask, a, b) end#

Per-lane: [mask]'s lane high bit set selects [a]'s lane, else [b]'s lane.

fnselect_i32x4select_i32x4(mask, a, b) do simd_i32x4_select(mask, a, b) end#

Per-lane: [mask]'s lane high bit set selects [a]'s lane, else [b]'s lane.

fnselect_i64x2select_i64x2(mask, a, b) do simd_i64x2_select(mask, a, b) end#

Per-lane: [mask]'s lane high bit set selects [a]'s lane, else [b]'s lane.

fnselect_u8x16select_u8x16(mask, a, b) do simd_u8x16_select(mask, a, b) end#

Per-lane: [mask]'s lane high bit set selects [a]'s lane, else [b]'s lane.

fnshl_i32x4shl_i32x4(v, n : Int) do simd_i32x4_shl(v, n) end#

Per-lane logical shift left by [n] (masked to the element width).

fnshl_i64x2shl_i64x2(v, n : Int) do simd_i64x2_shl(v, n) end#

Per-lane logical shift left by [n] (masked to the element width).

fnshr_i32x4shr_i32x4(v, n : Int) do simd_i32x4_shr(v, n) end#

Per-lane arithmetic shift right by [n] (masked to the element width, sign-extending).

fnshr_i64x2shr_i64x2(v, n : Int) do simd_i64x2_shr(v, n) end#

Per-lane arithmetic shift right by [n] (masked to the element width, sign-extending).

fnsplat_f32x4splat_f32x4(v : Float) do simd_f32x4_splat(v) end#

All lanes set to [v] (rounded to binary32).

fnsplat_f64x2splat_f64x2(v : Float) do simd_f64x2_splat(v) end#

All lanes set to [v].

fnsplat_i32x4splat_i32x4(v : Int) do simd_i32x4_splat(v) end#

All lanes set to [v].

fnsplat_i64x2splat_i64x2(v : Int) do simd_i64x2_splat(v) end#

All lanes set to [v].

fnsplat_u8x16splat_u8x16(v : Int) do simd_u8x16_splat(v) end#

All lanes set to [v].

fnsqrt_f32x4sqrt_f32x4(v) do simd_f32x4_sqrt(v) end#

Per-lane square root.

fnsqrt_f64x2sqrt_f64x2(v) do simd_f64x2_sqrt(v) end#

Per-lane square root.

fnstore_f32x4store_f32x4(arr, i : Int, v) do simd_f32x4_store(arr, i, v) end#

Store [v]'s 4 lanes into [arr] starting at index [i], returning the updated array (dynamic bounds check; panics out of range).

fnstore_f64x2store_f64x2(arr, i : Int, v) do simd_f64x2_store(arr, i, v) end#

Store [v]'s 2 lanes into [arr] starting at index [i], returning the updated array (dynamic bounds check; panics out of range).

fnstore_i32x4store_i32x4(arr, i : Int, v) do simd_i32x4_store(arr, i, v) end#

Store [v]'s 4 lanes into [arr] starting at index [i], returning the updated array (dynamic bounds check; panics out of range).

fnstore_i64x2store_i64x2(arr, i : Int, v) do simd_i64x2_store(arr, i, v) end#

Store [v]'s 2 lanes into [arr] starting at index [i], returning the updated array (dynamic bounds check; panics out of range).

fnstore_u8x16store_u8x16(arr, i : Int, v) do simd_u8x16_store(arr, i, v) end#

Store [v]'s 16 lanes into [arr] starting at index [i], returning the updated array (dynamic bounds check; panics out of range).

fnsub_f32x4sub_f32x4(a, b) do simd_f32x4_sub(a, b) end#

Per-lane subtraction, rounded to binary32.

fnsub_f64x2sub_f64x2(a, b) do simd_f64x2_sub(a, b) end#

Per-lane subtraction.

fnsub_i32x4sub_i32x4(a, b) do simd_i32x4_sub(a, b) end#

Per-lane subtraction, wraps mod 2^w.

fnsub_i64x2sub_i64x2(a, b) do simd_i64x2_sub(a, b) end#

Per-lane subtraction, wraps mod 2^w.

fnsum_f32x4sum_f32x4(v) do simd_f32x4_sum(v) end#

Horizontal sum of all lanes, accumulated sequentially in double.

fnsum_f64x2sum_f64x2(v) do simd_f64x2_sum(v) end#

Horizontal sum of all lanes, accumulated sequentially in double.

fnsum_i32x4sum_i32x4(v) do simd_i32x4_sum(v) end#

Horizontal sum of all lanes, accumulated sequentially in i64.

fnsum_i64x2sum_i64x2(v) do simd_i64x2_sum(v) end#

Horizontal sum of all lanes, accumulated sequentially in i64.

fnxor_f32x4xor_f32x4(a, b) do simd_f32x4_xor(a, b) end#

Per-lane bitwise XOR.

fnxor_f64x2xor_f64x2(a, b) do simd_f64x2_xor(a, b) end#

Per-lane bitwise XOR.

fnxor_i32x4xor_i32x4(a, b) do simd_i32x4_xor(a, b) end#

Per-lane bitwise XOR.

fnxor_i64x2xor_i64x2(a, b) do simd_i64x2_xor(a, b) end#

Per-lane bitwise XOR.

fnxor_u8x16xor_u8x16(a, b) do simd_u8x16_xor(a, b) end#

Per-lane bitwise XOR.